Moore's law, the observation that the number of circuit elements on top-end chips is increasing exponentially, has different consequences  for different kinds of chips. On microprocessors, growth has been  used to increase circuit and computational concurrency. DRAM memory  parts, however, have gotten much bigger without much change in  externally visible concurrency or speed. These diverging trends are  leading to an 'impedance mismatch' between processors and memory that  is making McKee and Wulf's 'memory wall' worse rather than better.  In this talk we will address aspects of this problem in several ways.  First, we will present the results of empirical measurements across a  wide range of recent systems. Second, we will discuss the  implications for applications, compilers, and system software. Third,  we will present an overview of current project's at the Renaissance  Computing Institute that are addressing aspects of the problemFourth, we will finish by speculating on future architectural trends.

Rob Fowler is Director of High Performance Computing at the Renaissance Computing Institute in Chapel Hill. Prior to that he was at the the Center for High Performance Software Research at Rice University. His education includes an A.B. in Physics from Harvard (1971) and M.S. (1981) and Ph.D. (1985) degrees from the University of Washington. His research interests are in the area of high performance distributed and parallel computing. Specific interests include compilers and programming environments, architectures, operating systems, performance evaluation,and simulation.