Seminars & Colloquia

Kathy Yelick

Electrical Engineering and Computer Sciences Department, UC Berkeley, California

"Programming Models for Petascale"

Monday February 11, 2008 04:00 PM
Location: 3211, EB-2 NCSU Centennial Campus
(Visitor parking instructions)

This talk is part of the Triangle Computer Science Distinguished Lecturer Series



Petascale systems will soon be available to the computational science community at multiple sites. These systems will represent a variety of architectural models, but with one common component, which is an increasing reliance on multicore technology as the building block for these machines. This "sea change" towards on-chip parallelism brings into question the message-passing programming model that has dominated high-end programming for the past decade. In this talk I will describe an alternative to message passing called Partitioned Global Address Space (PGAS) languages, describe some of the performance and scaling advantages, and also advocate a new notion of high end programming in which software is designed up-front to be adaptable to current and future systems.

Short Bio:

Katherine Yelick is the Director of the National Energy Research Scientific Computing Center (NERSC) at Lawrence Berkeley National Laboratory and a Professor of Electrical Engineering and Computer Sciences at the University of California at Berkeley. She is the author or co-author of two books and more than 85 refereed technical papers on parallel languages, compilers, algorithms, libraries, architecture, and storage. She co-invented the UPC and Titanium languages and demonstrated their applicability across architectures through the use of novel runtime and compilation methods. She also developed techniques for self-tuning numerical libraries, such as the OSKI sparse matrix library, which automatically adapt the code to machine properties. Her work includes performance analysis and modeling as well as optimization techniques for memory hierarchies, multicore processors, communication libraries, and processor accelerators. She earned her Ph.D. in Electrical Engineering and Computer Science from MIT and has been a professor of Electrical Engineering and Computer Sciences at UC Berkeley since 1991 with a joint research appointment at Berkeley Lab since 1996. She has received multiple research awards, as well as teaching awards from both UC Berkeley and MIT.

Host: Xiaosong Ma, Computer Science, NCSU

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