Seminars & Colloquia
IBM T. J. Watson Research Center
"Compiler Optimizations For Highly Constrained Multithreaded Multicore Processors"
Monday March 19, 2007 09:30 AM
Location: 3211, EB2 NCSU Centennial Campus
(Visitor parking instructions)
In this presentation, I will talk about my research on Intel's IXP processor, which is specially designed for network applications. To take advantage of the packet level parallelism, this processor incorporates many multithreaded cores. Hardware imposes extra constraints on operand fetching, which must be properly handled by the compiler. Threads are simultaneously active to avoid context switch overhead such that long latency operations can be overlapped through fast context switches. However, this mechanism greatly increases register pressure. Moreover, OS is considered too expensive to be installed, although some of the OS services are desperately needed. We proposed a number of compiler techniques to address the hardware constraints, increase resource sharing across threads, and manage thread execution intelligently. Through clever compiler optimizations, we were able to achieve up to 50% performance improvement and eliminate most of the unnecessary stalls (another 20-30% speedup). Some of the optimizations were subsequently implemented by Intel in their research compiler.
Host: Frank Mueller, Computer Science, NCSU