Biography

Dr. Ozturk is an Adjunct Professor in Computer Science Department. His research interests are in the areas of manycore accelerators, on-chip multiprocessing, computer architecture, heterogeneous architectures, cloud computing, GPU computing, and compiler optimizations. Prior to joining Bilkent in Spring 2008, he worked as a software optimization engineer in Cellular and Handheld Group at Intel and Marvell. Dr. Ozturk's research has been recognized by Fulbright Senior Scholar Award in 2014, Turk Telekom Research Collaboration Award in 2012, IBM Faculty Award in 2009, European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC) Paper Award in 2009, and ICPADS Best Paper Award in 2006. He is a member of GSRC, HiPEAC, IEEE, and ACM and is currently serving as editor/reviewer on leading IEEE, ACM, and various other journals.

Research Areas

  • Architecture and Operating Systems
  • Embedded and Real-Time Systems
  • Parallel and Distributed Systems
  • Scientific and High Performance Computing

Education

Ph.D. Computer Science and Engineering, The Pennsylvania State University, 2007
M.S. Computer Engineering, University Of Florida, 2002
B.Sc. Computer Engineering, Bogazici University, Turkey, 2000 

Spring Courses

  • CSC 116-005 LEC Intro Comp - Java   TTh 8:30am-10:20am   Room: 255 Daniels Hall

  • CSC 116-009 LEC Intro Comp - Java   MW 8:30am-10:20am   Room: 200 Daniels Hall

Publications

Books

Memory Hierarchy Design For Chip Multiprocessors - A Compiler Directed Approach, by Ozcan Ozturk, VDM Verlag.

Book Chapters

  1. Workload Clustering for Increasing Energy Savings in MPSoCs, by O. Ozturk, M. Kandemir, and S. H. K. Narayanan,Energy Efficient Distributed Computing Systems, John Wiley & Sons Inc., Editor: Albert Zomaya, ISBN: 978-0-470-90875-4, pages 549--565.
  2. Improving Multicore System Performance Through Data Compression, by O. Ozturk and M. Kandemir, Programming Multi-core and Many-core Computing Systems, Book Editors Sabri Pllana and Fatos Xhafa, John Wiley & Sons Inc., In Press.
  3. Enabling Network Security in HPC Systems Using Heterogeneous CMPs, by O. Ozturk and S. Tosun, High-Performance Computing on Complex Environments, John Wiley & Sons Inc., Editor: Emmanuel Jeannot and Julius Zilinskas, ISBN: 978-1-118-71205-4, pages 383--401.

Patents

  1. Nishkam Ravi, Tao Bao, Ozcan Ozturk, and Srimat Chakradhar. "A COMPILER FOR X86-BASED MANY-CORE COPROCESSORS", Disclosure 11032a (449-241).
  2. Nishkam Ravi, Tao Bao, Ozcan Ozturk, and Srimat Chakradhar. "AN OPTIMIZING COMPILER FOR IMPROVING APPLICATION PERFORMANCE ON MANY-CORE COPROCESSORS", Disclosure 11032b (449-242).

You can access electronic copies of the following papers from DBLP

Journals

  1. Cache Hierarchy-Aware Query Mapping On Emerging Multicore Architectures, by Ozcan Ozturk, Umut Orhan, Wei Ding, Praveen Yedlapalli, Mahmut Kandemir, IEEE Transactions on Computers (TC), Accepted.
  2. Graph Analytics Accelerators for Cognitive Systems, by Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, John Greth, Steven Burns, and Ozcan Ozturk. IEEE Micro Magazine, Accepted.
  3. Pipelined Fission for Stream Programs with Dynamic Selectivity and Partitioned State, by Bugra Gedik, Habibe G Ozsema, Ozcan Ozturk, Journal of Parallel and Distributed Computing, Volume 96, pages 106-120, October 2016.
  4. Fault-Tolerant Topology Generation Method for Application-Specific Network-on-Chips, by Tosun, S.; Ajabshir, V.; Mercanoglu, O.; Ozturk, O. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2015.2413848.
  5. Application mapping algorithms for mesh-based network-on-chip architectures, by Suleyman Tosun, Ozcan Ozturk, Erencan Ozkan and Meltem Ozen, The Journal of Supercomputing, Volume 71, Issue 3, Pages 995-1017, 2015.
  6. Energy Reduction in 3D NoCs Through Communication Optimization, O. Ozturk, I. Akturk, I. Kadayif, and S. Tosun, Computing, Vol 97, Issue 6, Pages 593-609, 2015.
  7. Voltage Island Based Heterogeneous NoC Design Through Constraint Programming, by Ayhan Demiriz, Nader Bagherzadeh, Ozcan Ozturk. Computers and Electrical Engineering, Computers & Electrical Engineering, Volume 40, Issue 8, Pages 307-316, 2014.
  8. Application-Specific Heterogeneous Network-on-Chip Design, by Dilek Demirbas; Ismail Akturk; Ozcan Ozturk; Ugur Gudukbay. The Computer Journal, Volume 57, Issue 8, pages 1117-1132, August 2014.
  9. Improving application behavior on heterogeneous manycore systems through kernel mapping, O. E. Albayrak, I. Akturk, and O. Ozturk, , Parallel Computing, Volume 39, Issue 12, December 2013, Pages 867-878.
  10. Hardware/Software Approaches for Reducing the Process Variation Impact on Instruction Fetches, by I. Kadayif, M. Turkcan, S. Kiziltepe, and O. Ozturk, ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 18, Number 4, Pages 54:1-54:23, October 2013.
  11. A Decoupled Local-Memory Allocator, by B. Diouf, C. Hantas, A. Cohen, O. Ozturk, and J. Palsberg, ACM Transactions on Architecture and Code Optimization (TACO), Vol. 9, No. 4, Article 34, Publication date: January 2013.
  12. Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems, by O. Ozturk, M. Kandemir, and G. Chen, IEEE Transactions on Computers (TC), Vol. 62, No. 2, pages 268-278, February 2013.
  13. Reliability-Aware Heterogeneous 3D Chip Multiprocessor Design, by Ismail Akturk and Ozcan Ozturk. Journal of Electronic Testing Theory and Applications, Volume 29, Issue 2, pages 177-184, April 2013.
  14. Reducing Memory Space Consumption Through Dataflow Analysis, by O. Ozturk, Computer Languages, Systems & Structures, Volume 37, Issue 4, October 2011, pages 168-177.
  15. Multicore Education Through Simulation, by O. Ozturk, IEEE Transactions on Education (TE), Volume 54, Issue 2, pages 203-209, May 2011.
  16. Data Locality and Parallelism Optimization Using A Constraint-Based Approach, by O. Ozturk, Journal of Parallel and Distributed Computing (JPDC), Volume 71, Issue 2, pages 280-287, January 2011.
  17. Heterogeneous NoC Design Through Evolutionary Computing, by Ozcan Ozturk and Dilek Demirbas, International Journal of Electronics, Francis & Taylor, Volume 97, No. 10, pages 1139-1161, 2010.
  18. On-Chip Memory Space Partitioning for Chip Multiprocessors using Polyhedral Algebra, by Ozcan Ozturk, Mahmut Kandemir, and Mary J. Irwin, IET Computers & Digital Techniques, Volume 4, Issue 6, pages 484-498, 2010.
  19. Improving Chip Multiprocessor Reliability Through Code Replication, by Ozcan Ozturk. Computers & Electrical Engineering, Elsevier, Issue 36, pages 480 - 490, 2010.
  20. Compiler Directed Communication Reliability Enhancement for Chip Multiprocessors, by O. Ozturk, M. Kandemir, S. Narayanan, and M. J. Irwin. ACM SIGPLAN Notices, Vol. 45, No. 4, pp. 85-94, 2010.
  21. Using Data Compression for Increasing Memory System Utilization, by Ozcan Ozturk, Mahmut Kandemir, Mary J. Irwin. IEEE Transactions on Computer Aided Design, Volume 28, Number 6, pages 901-914, June 2009.
  22. Shared scratch pad memory space management across applications, by O. Ozturk, M. Kandemir, S. W. Son, and I. Kolcu. International Journal of Embedded Systems, Vol. 4, No.1 pp. 54 - 65, 2009.
  23. ILP Based Energy Minimization Techniques for Banked Memories, by O. Ozturk and M. Kandemir. ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13 , Issue 3, July 2008.
  24. Access Pattern-Based Code Compression For Memory-Constrained Systems, by O. Ozturk, M. Kandemir, and G. Chen. ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13, Issue 4, September 2008.
  25. Compiler-Directed Energy Optimization for Parallel Disk Based Systems, by S. W. Son, G. Chen, O. Ozturk, M. Kandemir, and A. Choudhary, IEEE Transactions on Parallel and Distributed Systems (TPDS), Volume 18, Number 9, pp. 1241-1257, September, 2007.
  26. Optimizing Array-Intensive Applications for On-Chip Multiprocessors, by I.Kadayif, M.Kandemir, G.Chen, O.Ozturk, M.Karakoy, and U.Sezer. IEEE Transactions on Parallel and Distributed Systems (TPDS), Volume 16, Number 5, May 2005.
  27. An ILP formulation for task scheduling on heterogeneous chip multiprocessors, by S. Tosun, N. Mansouri, and M. Kandemir. Lecture Notes in Computer Science (LNCS) 4263 Springer 2006, ISBN 3-540-47242-8.
  28. An ILP-Based Approach to Locality Optimization, by G. Chen, O. Ozturk, and M. Kandemir. Lecture Notes in Computer Science (LNCS) 3602 Springer 2004, Languages and Compilers for High Performance Computing, pages 149-163.
  29. Using data compression to increase energy savings in multi-bank memories, by M.Kandemir, O.Ozturk, M.J.Irwin, and I.Kolcu. Lecture Notes in Computer Science (LNCS) 3149 Springer 2004, ISBN 3-540-22924-8, pages 310-317.

Conferences-Workshops

  1. Energy Efficient Architecture for Graph Analytics Accelerators, by M. M. Ozdal, S. Yesil, T. Kim, A. Ayupov, J. Greth, S. Burns, O. Ozturk. In Proc. of ACM/IEEE Int'l Symposium on Computer Architecture (ISCA), June 2016.
  2. Boosting Performance of Directory-based Cache Coherence Protocols with Coherence Bypass at Subpage Granularity and A Novel On-chip Page Table, by Mohammadreza Soltaniyeh, Ismail Kadayif, and Ozcan Ozturk. In Proceedings of ACM International Conference on Computing Frontiers 2016, May 16 - 18, 2016, Como, Italy.
  3. Neighborhood Solidarity SRAM For Reliability Enhancement of SRAM Memories, by Ihsen Alouani, Hamzeh Ahangari, Ozcan Ozturk, Smail Niar. The 17th Euromicro Conference on Digital Systems Design, Limassol, Cyprus, August 31-September 2, 2016.
  4. Register file reliability enhancement through adjacent narrow-width exploitation, by Hamzeh Ahangari, Ihsen Alouani, Ozcan Ozturk, Smail Niar and Atika Rivenq. In Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, April 12-14.
  5. FPGA implementation of a fault-tolerant application-specific NoC design, by Serif Yesil, Suleyman Tosun, and Ozcan Ozturk. In Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, April 12-14.
  6. Adaptive routing framework for network on chip architectures, Naveed Ul Mustafa, Ozcan Ozturk, Smail Niar. In Proceedings of The 8th Workshop on Rapid Simulation and Performance Evaluation Methods and Tools, 18 Jan 2016, Prague, Czech Republic.
  7. Implications of Non-Volatile Memory as Primary Storage for Database Management Systems, by Naveed Ul Mustafa, Adria Armejach, Ozcan Ozturk, Adrian Cristal and Osman Unsal. Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XVI), Samos, Greece, July 18-21, 2016.
  8. Proceedings of the 2016 International Conference on Supercomputing, ICS 2016, by Ozcan Ozturk, Kemal Ebcioglu, Mahmut T. Kandemir, and Onur Mutlu. Istanbul, Turkey, June 1-3, 2016.
  9. Architectural Requirements for Energy Efficient Execution of Graph Analytics Applications, by Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, Steven M. Burns, Ozcan Ozturk, ICCAD 2015: 676-681.
  10. Hardware Accelerator Design for Data Centers, by Serif Yesil, Muhammet Mustafa Ozdal, Taemin Kim, Andrey Ayupov, Steven M. Burns, Ozcan Ozturk, ICCAD 2015: 770-775.
  11. Exploiting Heterogeneity in Cache Hierarchy in Dark- Silicon 3D Chip Multi-Processors, Arghavan Asad, Ozcan Ozturk, Mahmood Fathy and Mohammad Reza Jahed-Motlagh. In Proc. of The 18th Euromicro Conference on Digital Systems Design, Funchal, Madeira, Portugal in August 26-28, 2015.
  12. JSRAM: A Circuit-level Technique for Trading-off Robustness and Capacity in Cache Memories, by Hamzeh Ahangari, Gulay Yalcin, Ozcan Ozturk, Osman Unsal, and Adrian Cristal. In Proc. of IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, July 8-10, 2015.
  13. Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, by Ozcan Ozturk, Kemal Ebcioglu, and Sandhya Dwarkadas, ASPLOS '15, Istanbul, Turkey, March 14-18, 2015. ACM 2015, ISBN 978-1-4503-2835-7.
  14. Fault Tolerant Irregular Topology Design Method for Network-on-Chips, by Suleyman Tosun, Vahid Babaei Ajabshir, Ozge Mercanoglu, and Ozcan Ozturk. In Proc. of The 17th Euromicro Conference on Digital Systems Design, Verona, Italy, August 27-29, 2014.
  15. AutopaR: An Automatic Parallelization Tool for Recursive Calls, by Mert Emin Kalender, Cem Mergenci, and Ozcan Ozturk. In Proc. of The 43rd International Conference on Parallel Processing (ICPP-2014), The Fifth International Workshop on Parallel Software Tools and Tool Infrastructures (PSTI 2014), Minneapolis, MN, September, 2014.
  16. Adaptive Compute-phase Prediction and Thread Prioritization to Mitigate Memory Access Latency, by Ismail Akturk and Ozcan Ozturk. In Proc. of International Workshop on Manycore Embedded Systems, June 2014, Minneapolis, MN.
  17. Staggered Latch Bus: A Reliable Offset Switched Architecture for Long On-Chip Interconnect, by Melvin Eze, Ozcan Ozturk, and Vijaykrishnan Narayanan. 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Istanbul, Turkey, October 2013.
  18. A Decoupled Local-Memory Allocator, Boubacar Diouf, Can Hantas, Albert Cohen, Jens Palsberg, and Ozcan Ozturk. 8th International Conference on High Performance and Embedded Architectures and Compilers (HiPEAC'13), Berlin, Germany, January 2013.
  19. ILP-Based Communication Reduction for Heterogeneous 3D Network-on-Chips, Ismail Akturk and Ozcan Ozturk. In Proc. of 21st Euromicro International Conference on Parallel, Distributed and Networked-Based Processing (PDP'13), Belfast, Northern Ireland, February 2013.
  20. Effective Kernel Mapping for OpenCL Applications in Heterogeneous Platforms, Omer Erdil Albayrak, Ismail Akturk and Ozcan Ozturk. In Proc. of Fifth International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2), September 2012, Pittsburgh, PA, USA.
  21. Reliability-Aware 3D Chip Multiprocessor Design, Ismail Akturk and Ozcan Ozturk. In Proc. of Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12), Annecy, France, June 2012.
  22. Code Scheduling for Optimizing Parallelism and Data Locality, by T. Yemliha, M. Kandemir, O. Ozturk, E. Kultursay, and S.P.Muralidhara. In Proc. of Euro-Par September 2010, Ischia, Italy.
  23. Mapping Applications on Autonomic Network-On-Chip Architectures (poster), by C. Hantas and O. Ozturk. ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES) 2010 WiP-PS, Stockholm, Sweeden, April 2010.
  24. Integer Linear Programming Based Mission Planning for UAVs (abstract), by O. Ozturk and C. Hantas. In Proc. of International Unmanned Vehicles Workshop-UVW2010, Istanbul, Turkey, June 2010.
  25. Optimizing Shared Cache Behavior of Chip Multiprocessors, by M. Kandemir, S.P.Muralidhara, S. Narayanan, Y. Zhang, and O. Ozturk. In Proc. of The 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'09), New York City, NY, December 2009.
  26. Slicing Based Code Parallelization for Minimizing Interprocessor Communication, by M. Kandemir, Y. Zhang, S. P. Muralidhara, O. Ozturk and S. Narayanan. In Proc. of CASES'09, Grenoble, France, October 2009.
  27. Optimizing Scratch-Pad Memory Allocation and Assignment Through a Decoupled Approach, Boubacar Diouf, Ozcan Ozturk, and Albert Cohen. In Proc. of the 22nd International Workshop on Languages and Compilers for Parallel Computing (LCPC'09), October 2009, Newark, Delaware.
  28. An ILP Formulation for Application Mapping onto Network-on-Chips, by S. Tosun, O. Ozturk, M. Ozen. In Proc. of The 3rd IEEE International Conference on Application of Information and Communication Technologies (AICT'09), Baku, Azerbaijan, October 2009.
  29. Multicore Education Through Simulation, Ozcan Ozturk. In Proc. Of Microelectronic Systems Education (MSE'09), July 2009, San Francisco, CA.
  30. Dynamic Thread and Data Mapping for NoC Based CMPs, Mahmut Kandemir, Ozcan Ozturk, and S.P.Muralidhara. In Proc. of 46th Design Automation Conference (DAC'09), July 2009, San Francisco, CA.
  31. Heterogeneous Chip Multiprocessor Design (poster), Ozcan Ozturk. Designing for embedded parallel computing platforms: architectures, tools, and applications Workshop, Design, Automation and Test in Europe (DATE'09).
  32. Using Dynamic Compilation for Continuing Execution Under Reduced Memory Availability, Ozcan Ozturk, Mahmut Kandemir. In Proc. of Design, Automation and Test in Europe (DATE'09), Nice, France, April 2009.
  33. Adaptive Prefetching for Shared Cache Based Chip Multiprocessors, Mahmut Kandemir, Yuanrui Zhang, Ozcan Ozturk. In Proc. of Design, Automation and Test in Europe (DATE'09), Nice, France, April 2009.
  34. Process Variation Aware Thread Mapping For Chip Multiprocessors by S Hong, S H K Narayanan, and M Kandemir, O Ozturk. In Proc. of Design, Automation and Test in Europe (DATE'09), Nice, France, April 2009.
  35. SPM Management Using Markov Chain Based Data Access Prediction, by T. Yemliha, S. Srikantaiah, M. Kandemir, and O. Ozturk. In Proc. International Conference on Computer Aided Design (ICCAD'08), San Jose, CA, November 2008.
  36. Prefetch Throttling and Data Pinning for Improving Performance of Shared Caches by O. Ozturk, S. W. Son, M. Kandemir, and M. Karakoy. To appear in Proc. of the ACM/IEEE Conference on High Performance Networking and Computing (SC'08), Austin, TX, Nov 2008. v
  37. Profiler and Compiler Assisted Adaptive I/O Prefetching for Shared Storage Caches, by S. W. Son, S. P. Muralidhara, O. Ozturk, M. Kandemir, I. Kolcu, and M. Karakoy. In Proc. International Conference on Parallel Architecture and Compilation Techniques PACT-2008 Toronto , Canada October 25-29, 2008.
  38. Software-Directed Combined CPU/Link Voltage Scaling for NoC-Based CMPs, by O. Ozturk and M. Kandemir. In Proc. the ACM SIGMETRICS (International Conference on Measurement and Modeling of Computer Systems), Annapolis, MD, June 2008.
  39. A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm, by O. Ozturk, M. Kandemir, and S. H. K. Narayanan. In Proc. the 9th International Symposium on Quality Electronic Design (ISQED'08), San Jose, CA, March 2008.
  40. An ILP Based Approach to Reducing Energy Consumption in NoC Based CMPs, by O. Ozturk, M. Kandemir, and S. W. Son. In Proc. of the International Symposium on Low Power Electronics and Design (ISLPED'07), pp. 411-414, Portland, OR, Aug 2007.
  41. A Memory-Conscious Code Parallelization Scheme, by L. Xue, O. Ozturk, and M. Kandemir. In Proc. of the 44th Design Automation Conference (DAC'07); June 2007; San Diego, CA.
  42. Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors; by H. Koc, M. Kandemir, E. Ercanli, O. Ozturk; In Proc. of the 44th Design Automation Conference (DAC'07); June 2007; San Diego, CA.
  43. Memory Bank Aware Dynamic Loop Scheduling by M. Kandemir, T. Yemliha, S. W. Son, and O. Ozturk. In Proc. of Design, Automation and Test in Europe (DATE'07), Nice, France, April 2007.
  44. Compiler-Directed Variable Latency Aware SPM Management to Cope With Timing Problems, by O. Ozturk, M. Kandemir, and M. Karakoy. In Proc. IEEE/ACM International Symposium on Code Generation and Optimization (CGO'07), San Jose, CA, March 2007.
  45. An ILP Formulation for Recomputation Based SPM Management for Embedded CMPs; by Hakduran Koc, Ehat Ercanli, Mahmut T. Kandemir, Ozcan Ozturk; In Proceedings of the 5th Workshop on Optimizations for DSP and Embedded Systems (ODES'07); March 2007; San Jose, CA.
  46. Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings, by M. Kandemir, O. Ozturk, and V. S. Degalahal. In Proc. 20th International Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.
  47. A Process Scheduler-Based Approach to NoC Power Management, by F. Li, G. Chen, M. Kandemir, O. Ozturk, M. Karakoy, R. Ramanarayanan, and B. Vaidyanathan. In Proc. 20th International Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.
  48. Compiler-Directed Code Restructuring for Operating with Compressed Arrays, by T. Yemliha, G. Chen, O. Ozturk, M. Kandemir, and V. S. Degalahal. In Proc. 20th International Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.
  49. Locality-Aware Distributed Loop Scheduling For Chip Multiprocessors, by L. Xue, M. Kandemir, G. Chen, F. Li, O. Ozturk, R. Ramanarayanan, and B. Vaidyanathan. In Proc. 20th International Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.
  50. Cache miss clustering for banked memory systems, by O. Ozturk, G. Chen, M. Kandemir, and M. Karakoy. In Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD'06), San Jose, CA, November 2006.
  51. Minimizing energy consumption of banked memories using data recomputation, by H. Koc, O. Ozturk, M. Kandemir, S. H. K. Narayanan, and E. Ercanli. In Proc. International Symposium on Low Power Electronics and Design (ISLPED'06), Tegernsee, Germany, October 2006.
  52. Energy-aware code replication for improving reliability in embedded chip multiprocessors, by G. Chen, O. Ozturk, and M. Kandemir. In Proc. IEEE International SOC Conference (SOCC'06), Austin, TX, September 2006.
  53. A Constraint Network Based Solution to Code Parallelization, by O. Ozturk, G. Chen, and M. Kandemir. In Proc. Design Automation Conference (DAC'06), San Francisco, CA, July 2006. (Best Paper Candidate)
  54. Multi-level On-chip Memory Hierarchy Design for Embedded Chip Multiprocessors, by O. Ozturk, M. Kandemir, M. J. Irwin, and S. Tosun. In Proc. The Twelfth International Conference on Parallel and Distributed Systems (ICPADS'06), July 2006. (Best Paper Award)
  55. Selective Code/Data Migration for Reducing Communication Energy in Embedded MpSoC Architectures, by O. Ozturk, M. Kandemir, and M. Karakoy. In Proc. GLSVLSI, Philadelphia, PA, May 2006.
  56. An ILP Based Approach to Address Code Generation for Digital Signal Processors, by O. Ozturk, M. Kandemir, and S. Tosun. In Proc. GLSVLSI, Philadelphia, PA, May 2006.
  57. Multi-compilation: capturing interactions among concurrently-executing applications, by O. Ozturk, G. Chen, and M. Kandemir. In Proc. ACM International Conference on Computing Frontiers, Ischia, Italy, May 2006.
  58. ILP-Based Management of Multi-Level Memory Hierarchies, by O. Ozturk, M. Kandemir, and S. W. Son. In Proc. 4th Workshop on Optimizations for DSP and Embedded Systems (ODES'06), Manhattan, New York, NY, March, 2006.
  59. Managing SPM Space Based on Inter-Application Data Sharing, by O. Ozturk, M. Kandemir, S. W. Son, and I. Kolcu. In Proc. 4th Workshop on Optimizations for DSP and Embedded Systems (ODES'06), Manhattan, New York, NY, March, 2006.
  60. Dynamic Scratch-Pad Memory Management for Irregular Array Access Patterns, by G. Chen, O. Ozturk, M. Kandemir, and M. Karakoy. Design Automation and Test in Europe (DATE'06), Munich, Germany, March 2006.
  61. Dynamic Partitioning of Processing and Memory Resources in Embedded MPSoC Architectures, by L. Xue, O. Ozturk, F. Li, and I. Kolcu. Design Automation and Test in Europe (DATE'06), Munich, Germany, March 2006.
  62. Data Replication in Banked DRAMs for Reducing Energy Consumption, by O. Ozturk and M. Kandemir. In Proc. the 7th International Symposium on Quality Electronic Design (ISQED'06), San Jose, CA, March 2006.
  63. Shared Scratch-Pad Memory Space Management, by O. Ozturk, M. Kandemir, and I. Kolcu. In Proc. the 7th International Symposium on Quality Electronic Design (ISQED'06), San Jose, CA, March 2006.
  64. Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs, by S. H. K. Narayanan, O. Ozturk, and M. Kandemir. In Proc. the 7th International Symposium on Quality Electronic Design (ISQED'06), San Jose, CA, March 2006.
  65. An Integer Linear Programming Based Approach to Simultaneous Memory Space Partitioning and Data Allocation for Chip Multiprocessors, by O. Ozturk, G. Chen, M. Kandemir, and M. Karakoy. In Proc. IEEE Computer Society Annual Symposium on VLSI 2006 (ISVLSI 2006), Karlsruhe, Germany, March, 2006.
  66. Task Recomputation in Memory Constrained Embedded Multi-CPU Systems, by H. Koc, S. Tosun, O. Ozturk, and M. Kandemir. In Proc. IEEE Computer Society Annual Symposium on VLSI 2006 (ISVLSI 2006), Karlsruhe, Germany, March, 2006.
  67. Compiler-Directed Management of Leakage Power in Software-Managed Memories, by G. Chen, F. Li, M. Kandemir, and O. Ozturk. In Proc. IEEE Computer Society Annual Symposium on VLSI 2006 (ISVLSI 2006), Karlsruhe, Germany, March, 2006.
  68. Leakage-Aware SPM Management, by G. Chen, F. Li, O. Ozturk, G. Chen, M. Kandemir, and I. Kolcu. In Proc. IEEE Computer Society Annual Symposium on VLSI 2006 (ISVLSI 2006), Karlsruhe, Germany, March, 2006.
  69. Compiler-Guided Data Compression for Reducing Memory Consumption of Embedded Applications, by O.Ozturk, G.Chen, M.Kandemir. In Proc. the Asia and South Pacific Design Automation Conference (ASPDAC'06), Yokohama, Japan, January 2006.
  70. Optimal Topology Exploration for Application-Specific 3D Architectures, by O.Ozturk, F.Wang, M.Kandemir, Y.Xie. In Proc. the Asia and South Pacific Design Automation Conference (ASPDAC'06), Yokohama, Japan, January 2006.
  71. Integrating Loop and Data Optimizations for Locality within a Constraint Network Based Framework, by G.Chen, O.Ozturk, M.Kandemir, and I.Kolcu. In Proc. International Conference on Computer Aided Design (ICCAD'05), San Jose, CA, November 2005.
  72. Increasing On-Chip Memory Space Utilization for Embedded Chip Multiprocessors through Data Compression. O.Ozturk, M.Kandemir, M.J.Irwin. In Proc. IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05), New York, September 2005.
  73. On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression. O.Ozturk, M.Kandemir, M.J.Irwin. In Proc. IEEE International SOC Conference (SOCC 2005), Washington, D.C., September 2005.
  74. Workload Clustering for Increasing Energy Savings on Embedded MPSoCs, S.H.K.Narayan, O.Ozturk, M.Kandemir, M.Karakoy. In Proc. IEEE International SOC Conference (SOCC 2005), Washington, D.C., September 2005.
  75. Constraint-Based Code Mapping for Heterogeneous Chip Multiprocessors, S. Tosun, N. Mansouri, M. Kandemir, O. Ozturk. In Proc. IEEE International SOC Conference (SOCC 2005), Washington, D.C., September 2005.
  76. Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs, by G.Chen, G.Chen, O.Ozturk, and M.Kandemir. In Proc. IEEE Computer Society Annual Symposium on VLSI 2005 (ISVLSI 2005), Tampa, Florida, May 11-12, 2005.
  77. A Data-Driven Approach for Embedded Security, by H.Saputra, O.Ozturk, N.Vijaykrishnan, M.Kandemir, and R.Brooks. In Proc. IEEE Computer Society Annual Symposium on VLSI 2005 (ISVLSI 2005), Tampa, Florida, May 11-12, 2005.
  78. Energy management in software-controlled multi-level memory hierarchies, by O.Ozturk and M.Kandemir. In Proc. GLSVLSI'05, Chicago, IL, April 2005.
  79. Integer linear programming based energy optimization for banked DRAMs, by O.Ozturk and M.Kandemir. In Proc. GLSVLSI'05, Chicago, IL, April 2005.
  80. Using data compression in an MPSoC architecture for improving performance, by O.Ozturk, M.Kandemir, and M.J.Irwin. In Proc. GLSVLSI'05, Chicago, IL, April 2005.
  81. Access pattern-based code compression for memory-constrained embedded systems, by O.Ozturk, H.Saputra, M.Kandemir, and I.Kolcu. In Proc. Design Automation and Test in Europe Conference (DATE'05), Munich, Germany, March 2005.
  82. BB-GC: basic-block level garbage collection, by O.Ozturk, M.Kandemir and M.J.Irwin. In Proc. Design Automation and Test in Europe Conference (DATE'05), Munich, Germany, March 2005.
  83. Nonuniform banking for reducing memory energy consumption, by O.Ozturk and M.Kandemir. In Proc. Design Automation and Test in Europe Conference (DATE'05), Munich, Germany, March 2005.
  84. Increasing register file immunity to transient errors, by G.Memik, M.Kandemir, and O.Ozturk. In Proc. Design Automation and Test in Europe Conference (DATE'05), Munich, Germany, March 2005.
  85. Studying storage-recomputation tradeoffs in memory-constrained embedded processing, by M.Kandemir, F.Li, G.Chen, G.Chen, and O.Ozturk. In Proc. Design Automation and Test in Europe Conference (DATE'05), Munich, Germany, March 2005.
  86. An ILP formulation for reliability-oriented high-level synthesis, by S.Tosun, O.Ozturk, N.Mansouri, E.Arvas, M.Kandemir, and Y.Xie. In Proc. the 6th International Symposium on Quality Electronic Design (ISQED'05), San Jose, CA, March 2005.
  87. An adaptive locality-conscious process scheduler for embedded systems, by G.Chen, G.Chen, O.Ozturk, and M.Kandemir. In Proc. 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'05), San Francisco, California, March 2005
  88. Customized on-chip memories for embedded chip multiprocessors, by O.Ozturk, M.Kandemir, G.Chen, M.J.Irwin, and M.Karakoy. In Proc. the Asia and South Pacific Design Automation Conference (ASPDAC'05), Shanghai, China, January 2005.
  89. Dynamic on-chip memory management for chip multiprocessors, by M.Kandemir, O.Ozturk, and M.Karakoy. In Proc. International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES'04), Washington D.C., September 2004.
  90. Data compression for improving SPM behavior, by O.Ozturk, M.Kandemir, I.Demirkiran, G.Chen, and M.J.Irwin. In Proc. the 41st Design Automation Conference (DAC'04), San Diego, CA, June 2004. (Best Paper Candidate)
  91. Tuning data replication for improving behavior of MPSoC applications, by O.Ozturk, M.Kandemir, M.J.Irwin, and I.Kolcu. In Proc. the 2004 Great Lakes Symposium on VLSI (GLSVLSI'04), Boston, MA, April 26-28, 2004.